Acknowledgments

Special gratitude goes to Silvia Mazzini (Intecs) for her thorough reading multiple drafts of this tutorial. We wish to thank Stefano Puri (intecs) for his technical insight in the HRT-UML/RCM toolset prototype. We would also like to thank the members of our research group, in particular Marco Panunzio and Matteo Bordin for their help in the sections related to Analysis and Code. Special thanks to Enrico Bini of the Scuola Superiore di Studi Universitari e di Perfezionamento Sant'Anna di Pisa (Italy) for his suggestions of definitions of static, feasibility and sensitivity analysis.

Notes

[1] Verbatim from an e-mail conversation between David Lesens and Pierre Dissaux centred on the interpretation of the requirements of the "Toy Example problem", cf. [DL06].

Bibliography

[AN05] J. Arlow, I. Neustadt. UML2 and the Unified Process 2nd Ed., Addison-Wesley, 2005

[BDV03] A. Burns, B. Dobbing, T. Vardanega. Guide to the Use of the Ada Ravenscar Profile in High Integrity Systems. Techinal Report YCS-2003-348. University of York (UK), 2003. available at http://www.cs.york.ac.uk/ftpdr/reports/YCS-2003-348.pdf

[CEPV06] V. Cechticky, M. Egli, A. Pasetti, T. Vardanega. A UML2 Profile for Reusable and Verifiable Software Components for Real-Time Applications. In Reuse of Off-The-Shelf Components (ICSR) volume 4039 of LNCS Series, Springer-Verlag, 2006. Related ASSERT deliverable reports: D4.2.4-1 (I1R2): Software Framework Concept (ETH, April 2005); D4.2.2-1 (I1R0): Software Building Block Adaptation Techniques (ETH, September 2005).

[CV06] D. Cancila, T. Vardanega. AP-level Containers: A Survival Kit. ASSERT - Internal Release. 004033.DDHRT3-1.TN.1, December, 2006

[DL06] D. Lesens, P. Disseaux. Converation about the Toy example for transaction. Feb. 2006.

[GS88] J.B. Goodenough, L. Sha. The Priority Ceiling Protocol: A Method for Minimising the Blocking of High-Priority Tasks. Ada Letters, ACM, 8(7):35-38, 1988

[Les06] D. Lesens. Toy example for transactions. Feb. 2006

[OMG03] Object Management Group. MDA Guide Version 1.0.1. 2003. available at http://www.omg.org/docs/omg/03-06-01.pdf

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Further Reading

On static scheduling analysis

E. Bini and G. Lipari. A methodology for designing hierarchical scheduling systems. Journal of Embedded Computing, Volume 1, Number 2, 2005, pages 257 - 269

R. I. Davis and A. Burns, Hierarchical Fixed Priority Pre-emptive Scheduling. In Proc. of the 26th IEEE Real-Time Systems Symposium, 2005, pages 389--398

E. Bini, M. Di Natale and G. Buttazzo. Sensitivity Analysis for Fixed-Priority Real-Time Systems. In Proc. of the 18th Euromicro Conference on Real-Time Systems, 2006.

Jose L. Lorente and J. Carlos Palencia. An EDF Hierarchical Scheduling Model for Bandwidth Servers. In Proc. of the 12th International Conference on Embedded and Real-Time Computing Systems and Applications, 2006

J.A. Pulido, S. Uruena, J. Zamorano, T. Vardanega and J.A. de la Puente. Hierarchical scheduling with Ada 2005. In Reliable Software Technologies - Ada-Europe 2006. Springer LNCS 4006, pages 1-12.

On modeling for analysis

M. Gonzalez Harbour, J.J. Gutierrez, J.C. Palencia and J.M. Drake. MAST: Modeling and Analysis Suite for Real-Time Applications. In Proc. of the 13th Euromicro Conference on Real-Time Systems, 2001

Marco Panunzio and Tullio Vardanega. A Metamodel-driven Process Featuring Advanced Model-based Timing Analysis. In Reliable Software Technologies - Ada-Europe, Springer LNCS 4498, 2007, pages 128-141

M. Bordin, T. Vardanega "Real-Time Java from an Automated Code Generation Perspective". In Proc. of the 5th international workshop on Java technologies for real-time and embedded systems, ACM Press, 2007